Esperanto’s Custom RISC-V ISA Extensions for Energy-Efficient Machine Learning Applic... Jayesh Iyer

Esperanto’s Custom RISC-V ISA Extensions for Energy-Efficient Machine Learning Applications - Jayesh Iyer, Esperanto Technologies Jayesh Iyer, Principal Architect at Esperanto, will explain the development of the company’s custom vector/tensor extensions to the RISC-V instruction-set architecture and how these new instructions are used to implement machine-learning models for data center inferencing applications. Attendees will learn how the extensions were selected and implemented in the company’s ET-Minion cores, what operations and data types are supported, how the extensions interact with other elements of the chip such as caches and the on-die interconnect, and how developers will be able to take advantage of the high computation and communication bandwidth delivered by Esperanto’s ET-SoC-1 “supercomputer on a chip.” What attendees will learn: • How Esperanto designed custom instruction-set extensions to adapt the company’s ET-Minion RISC-V core for machine-learning applications • How developers can t