TSMC FinFlex: How Chips are made Worse to get Better

A deep-dive into FinDepopulation & TSMCs FinFlex technology. How the height of transistors is keeping Moore’s Law alive. Become a supporter on Patreon: Follow me on Twitter/X: SemiAnalysis article: Ken Shirrif’s blog: 0:00 Intro 0:50 NMOS, PMOS & CMOS Transistors 3:34 3D FinFETs & Transistor Height 6:48 Logic Gates & Standard Cells 9:54 Process Node Cell Libraries 13:31 How Fin Depopulation works 14:48 FinFET Process Node Scaling 18:34 TSMC FinFlex & Standard Cell Height 23:22 The future of chip design