Lightning Talk: Using and Extending RISC-V in an Analog Matrix Proc... David Luo & Dr Zdeněk Přikryl

Lightning Talk: Using and Extending RISC-V in an Analog Matrix Processor for Neural Networks - David Luo, Mythic & Dr Zdeněk Přikryl, Codasip A characteristic of the RISC-V ISA is its provision for custom extensions enabling the ISA to be tailored to the needs of a particular workload. Mythic has developed the M1076 Analog Matrix Processor (AMP) chip for implementing neural networks for applications such as intelligent camera systems, robotics, etc. The AMP includes a configurable array of tiles. Each tile consists of a large analog compute engine, which stores the neural network weights, a local SRAM memory for data being passed between the neural network nodes, an SIMD unit for processing operations not handled by the analog compute array, and a RISC-V processor for controlling the sequencing and operation of the tile. The RISC-V processor is described in an architectural language which means that it is possible to extend the core by describing additional instructions and automatically generating the SDK,